DDR5 Loopback Configuration
The DDR5 test application depends on the DUT making bit decisions on its receiver and looping those decisions back to our Pattern Generator for measurement. This is a test mode of various DDR5 chips and this test mode must be configured and enabled to be able to proceed with measurements.
Enabling this test mode requires extra information about the test condition to be able to correctly loopback the right signal. Make these settings here and in the previous Card Type Configuration menu.
|
Phase |
|||||
|
Phase A / B / C / D |
Loopback of received test signals is always done at a slower rate (1/2 for RCDs and Buffers and 1/4 for DRAMS) to allow for a poor-performing, massively shared loopback wire resource to successfully send information back to the Pattern Generator. The longer bit period in the loopback signal allows for the return signals to settle enough to make good decisions downstream. Because of this, there are multiple phases of data at the Receivers that must be tested individually. Select which phase to send back over the loopback connection using this control. |
||||
Start Loopback Button |
|||||
|
|
This command button instructs the Pattern Generator to program the DDR5 DUT into loopback. It knows which type of test card, which chip type on the test card, and other parameters, from the settings made above. This command takes a few seconds to execute as it must program the Pattern Generator outputs to various levels during this process. |
||||
|
Change Settings Button |
|||||
|
|
This command programs the DUT to set a new loopback phase. This command is included in the "Loopback" function above. It also has its own command here, as it can be very fast to jump between phases once a device is already in loopback. |
||||
Running Loopback Initiation
This command takes 8-10 seconds to accomplish. During this time, progress messages and ending status are provided on the Command Log tab.
See Also